Execution Stream Fingerprinting for Low-cost Safety-critical System Design

Recently, the combination of semiconductor manufacturing technology scaling and pressure to reduce semiconductor system costs and power consumption has resulted in the development of computer systems responsible for executing a mix of safety-critical and non-critical tasks. However, such systems are poorly utilized if lockstep execution forces all processor cores to execute the same task even when not executing safety-critical tasks. Execution fingerprinting has emerged as an alternative to n-modular redundancy for verifying redundant execution without requiring that all cores execute the same task or even execute redundant tasks concurrently. Fingerprinting takes a bit stream characterizing the execution of a task and compresses it into a single, fixed-width word or fingerprint.

Fingerprinting has several key advantages. First, it reduces redundancy-checking bandwidth by compressing changes to external state into a single, fixed-width word. Second, it reduces error detection latency by capturing and exposing intermediate operations on faulty data. Third, it naturally supports the design of mixed criticality systems by making dual-, triple-, and n-modular redundancy available without requiring significant architectural changes. Fourth, while it can't guarantee perfect error detection, error detection probabilities and latencies can be tuned to a particular application. Together, these advantages translate to improved performance for mixed-criticality systems.

In this talk, I will describe fingerprinting in safety-critical systems and explore the various trade-offs inherent in its application at the architectural level and choices related to fingerprinting subsystem design, including: (a) determining what application data to compress, as a function of error detection probability and latency, and (b) identifying a corresponding fingerprinting circuit implementation.

Brett H. Meyer is a Chwang-Seto Faculty Scholar and assistant professor in the Department of Electrical and Computer Engineering at McGill University. He received his MS and PhD in Electrical and Computer Engineering from Carnegie Mellon University in 2005 and 2009, respectively. He received his BS in Electrical Engineering, Computer Science and Math from the University of Wisconsin-Madison in 2003. After receiving his PhD, Meyer worked as a post-doctoral research associate in the Computer Science Department at the University of Virginia. He has been on the faculty at McGill since 2011. Meyer's research interests are focused on the design and architecture of resilient multiprocessor computer systems.