Evolving Methodologies in Electronic Design Automation

Design of digital systems has witnessed significant changes in the past 50 years. The early paper and pencil methods of putting components of a digital system together hand analysis methods have given way to sophisticated design and verification tools and languages for description of hardware. Looking back at this half a century of design and implementation, a change in abstraction of hardware can be seen to occur every fifteen to twenty years.

The advent of hardware description languages in the mid to late 1980s, caused a significant change in digital system design methodology, and facilitated the move from gate-level to the register-transfer (RT) level of abstraction. Back in the early 1990s, it was difficult to imagine that in less than ten years, gate level designs would become so much of a thing of the past that justification of teaching gate level methods would only be for covering the fundamentals.

Another significant transition in the design and description of digital systems is presently in the works, and as in the RT level transition of nearly two decades ago, soon we will find ourselves in a situation that 90% of the designs and modeling of digital systems will be done at the electronic system level (ESL). Today’s hardware designers must be prepared for this change or start saving money for retirement.

This presentation focuses on principles, methodologies and tools used for a modern hardware design process. Design flows and hardware languages needed for each stage of the design process are discussed. We start with an overview of the evolution of design from transistor level to transaction level. Languages used at each level will briefly be discussed.
Dr. Zainalabedin Navabi is a professor of electrical and computer engineering at the University of Tehran, and an adjunct professor at Worcester Polytechnic Institute, Worcester, MA, USA. He is the author of ten books on various aspects of design of test with hardware description languages (HDL). His recent 2011 book on digital system testing incorporates RT level HDLs in the generation and application of test. Dr. Navabi's began his work in the EDA area in 1976, when he started the development of a register-transfer level (RTL) simulator for one of the very first HDLs. In 1981 he completed the development of an RTL synthesis tool. Since 1981, Dr. Navabi has been involved in the design, definition and implementation of HDLs. He has written numerous papers on HDLs, design automation, and digital system test. He started one of the first HDL courses in the US in 1990, and has since conducted short courses and tutorials in the United States and abroad. His research areas include high level design and description methodologies, digital system testing, and design and definition of HDLs. In addition to being a professor, he is also a consultant to CAE companies. Dr. Navabi received his M.S. and Ph.D. from the University of Arizona in 1978 and 1891, and his B.S. with Highest Honors from the University of Texas at Austin in 1975.