Computer Engineering Seminar
Checkpointed Processor Architecture
ADVANCED COMPUTER ARCHITECTURE LABORATORY
Department of Electrical Engineering and Computer Science
Room 1005 EECS
12:15 – 1:30 March 16, 2005
North Campus, University of Michigan
CHECKPOINTED PROCESSOR ARCHITECTURES
Prof. Jos é F. Mart ínez
Computer Systems Laboratory
Abstract: Checkpointed Processor Architectures (CPA) are out-of-order processors that use a hybrid mode of execution based on traditional in-order commit support and selective state checkpointing. CPAs allow decoupling of resource recycling from instruction commit, permitting more aggressive resource reclamation and higher effective utilization. They also enable speculative commit of some long-latency memory operations, allowing subsequent instructions to complete and commit as well. To recover from occasional corrupt state due to aggressive speculation, CPAs rely on their checkpointing ability. CPA's departure from traditional instruction processing allows processors to deliver higher performance growth without oversizing critical resources, which may affect the clock rate adversely. I will be presenting some of our CPA work, and comment on our group's overall research direction.
Bio: Jos é Mart ínez is assistant professor of computer engineering at Cornell University, where he leads the Microprocessor, Multithreaded, and Multiprocessor (M3) Architectures research group. He earned a Ph.D. in computer science in October 2002 from the University of Illinois at Urbana-Champaign.
His research interests include micro- and parallel architectures, power-aware parallel computing, and hardware-software interaction. His Ph.D. work on speculative synchronization was featured in the 2003 IEEE Micro Top Picks from Microarchitecture Conferences. More recently, his paper "checkpointed Early Load Retirement" won the Best Paper Award at the 2005 Intl. Symp. on High-performance Computer Architecture (HPCA). Prof. Mart ínez is a member of the ACM and the IEEE.
For more information on Prof. Mart ínez's research, please visit: http://m3.csl.cornell.edu/